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_______________________________________________________________ maxim integrated products 1 for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxims website at www.maxim-ic.com. usb battery charger detectors 19-5821; rev 1; 2/12 ordering information/selector guide general description the MAX14578E/max14578ae are usb charger detec - tors compliant with usb battery charging revision 1.1. the usb charger-detection circuitry detects usb stan - dard downstream ports (sdps), usb charging down - stream ports (cdps), or dedicated charger ports (dcps), and controls an external lithium-ion (li+) battery charger. the devices implement usb battery charging revision 1.1-compliant detection logic including data contact detection, d+/d- short detection, charging downstream port identification, and optional usb dead-battery charg - ing support. dead-battery charging support features a 45-minute (max) charge timer and weak battery voltage monitor controlled by i 2 c communication (MAX14578E only.) the max14578ae features an enable ( en ) input and an ldo output. in addition, the internal usb switch is compliant to hi-speed usb, full-speed usb, and low-speed usb signals. the devices feature low on-resistance, low on-resistance flatness, and very low capacitance. the devices also feature high-esd protection up to q 15kv human body model on the cd+ and cd- pins. in addition, the MAX14578E/max14578ae feature apple and sony charger detection that allows identification of resistor-divider networks on d+/d-. the MAX14578E/max14578ae are available in both a 12-bump, 0.4mm pitch, 1.3mm x 1.68mm wlp package and 16-pin tqfn package, and operate over the -40 n c to +85 n c extended temperature range. features s compliant to usb battery charging revision 1.1 s data contact detection for foolproof connector insertion detection s usb dead-battery charging support s charging downstream detection s apple/sony charger detection s dedicated charger detection s china yd/t1591-compliant charger detection s internal switches isolate the usb transceiver during the charger detection process s v bus connection capable of 28v s device status change interrupt s low supply current s high-esd protection on cd+ and cd- 15kv human body model 8kv iec 61000-4-2 contact discharge applications dsc and camcorder media players cell phones e-book readers mobile internet devices (mids) + denotes a lead(pb)-free/rohs-compliant package. * ep = exposed pad. t = tape and reel. evaluation kit available part i 2 c en ldo temp range pin-package top mark MAX14578E ewc+t yes no no -40 n c to +85 n c 12 wlp +abw MAX14578Eete+t yes no no -40 n c to +85 n c 16 tqfn-ep* aja max14578ae ewc+t no yes yes -40 n c to +85 n c 12 wlp +abx max14578aeete+t no yes yes -40 n c to +85 n c 16 tqfn-ep* ajb MAX14578E/max14578ae
2 ______________________________________________________________________________________ usb battery charger detectors stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. (all voltages referenced to gnd.) bat, int , sda, scl, ce0, ce1, ce2, en .......... -0.3v to +6.0v lout ........................................... -0.3v to (v b + 0.3v, 6v) (min) v b .......................................................................... -0.3v to +30v switch disabled or cp_ena = 1 (note 1) cd+, cd- ........................................ -2.1v to (v swpos + 0.3v) td+, td- ......................................... -0.3v to (v swpos + 0.3v) switch enabled or cp_ena = 0 (note 2) cd+, cd-, td+, td- ....................... -0.3v to (v vccint + 0.3v) continuous current into lout ..................................... 150ma continuous current into any other terminal .................. 50ma continuous power dissipation (t a = +70 n c) wlp (derate 13.7mw/ n c above +70 n c) ................. 1096mw tqfn (derate 20.8mw/ n c above +70 n c) .................. 1667mw operating temperature range ........................ -40 n c to +85 n c junction temperature .................................................. +150 n c storage temperature range ......................... -65 n c to +150 n c soldering temperature (reflow) ...................................... +260 n c wlp junction-to-ambient thermal resistance ( b ja ) .......... 73c/w tqfn junction-to-ambient thermal resistance ( b ja ) .......... 48c/w junction-to-case thermal resistance ( b jc ) .............. 10 c/w electrical characteristics (v bat = +2.8v to +5.5v, v b = +3.5v to +5.5v, t a = -40 n c to +85 n c, unless otherwise noted. typical values are at v bat = +3.6v, v b = +5.0v, t a = +25 n c.) (note 4) absolute maximum ratings package thermal characteristics (note 3) note 1: v swpos = (v vccint or 3.3v) (min) note 2: v vccint = (v bat, [(v b or 4.2v) (min)]) (max) note 3: package thermal resistances were obtained using the method described in jedec specification jesd51-7, using a four- layer board. for detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial . parameter symbol conditions min typ max units dc characteristics supply voltage range v bat 2.8 5.5 v v b 3.5 28 internal positive switch regulator v swpos 3.25 3.4 3.6 v internal negative switch regulator v swneg -2.06 -1.90 -1.76 v v bat uvlo v batuvlo v bat = 4.2v, v b = 0v 0.90 1.65 2.45 v v bus uvlo v busuvlo v bat = 0v, v b = 5.5v 1.0 1.33 3.30 v MAX14578E/max14578ae
_______________________________________________________________________________________ 3 usb battery charger detectors electrical characteristics (continued) (v bat = +2.8v to +5.5v, v b = +3.5v to +5.5v, t a = -40 n c to +85 n c, unless otherwise noted. typical values are at v bat = +3.6v, v b = +5.0v, t a = +25 n c.) (note 4) parameter symbol conditions min typ max units bat supply current i bat MAX14578E v bat = +3.6v, v b = 0v, cp_ena = 0, usbswc = 0 1 2.5 f a v bat = +4.2v, v b = 0v, cp_ena = 1, usbswc = 1, v sda = v scl = 1.8v 34.5 59 max14578ae v bat = +3.6v, v b < v vbraw , v en = +3.6v 1 2.5 v bat = +4.2v, v b = 0v, v en = 0v 1.3 30 supply current increase when v en = 1.6v, v bat = +4.2v 1.3 3.5 v b supply current i vb MAX14578E v b = +5.5v, cp_ena = 0, usbswc = 0 87 140 f a max14578ae v b = +5.5v, v en = 0v 190 2.95 v b = +5.5v, v en = +5.5v 75 125 lout (ldo out) (max14578ae only) lout current limit i lout 95 ma lout voltage v lout i lout = 10ma, v b = 5.0v 4.87 4.94 v i lout = 0ma, v b = 6.0v 4.0 5.3 5.5 lout debounce time t lout_deb v b = 5.0v to v lout = 4.5v 20 ms lout turn-on time 100 f s themal shutdown +141 n c themal shutdown hysteresis 20 n c charger detection v dp_src voltage v dp_src 0.5 0.7 v v dat_ref voltage v dat_ref 0.25 0.4 v v lgc voltage v lgc 0.8 2.0 v i dp_src current i dp_src 6.6 11 f a cd+ and cd- sink current i cd+_sink i cd-_sink 50 150 f a r cd resistance r cd 200 330 500 k i td+ pulldown resistor r td+_dwn 15 20 25 k i td- pulldown resistor r td-_dwn 14.25 24.8 k i charger detection weak sink i weak 0.18 f a MAX14578E/max14578ae
4 ______________________________________________________________________________________ usb battery charger detectors electrical characteristics (continued) (v bat = +2.8v to +5.5v, v b = +3.5v to +5.5v, t a = -40 n c to +85 n c, unless otherwise noted. typical values are at v bat = +3.6v, v b = +5.0v, t a = +25 n c.) (note 4) parameter symbol conditions min typ max units vbus25 ratio vbus25 reference ratio for special charger as a percentage of v bus voltage, v b = 5v 24 26 29 % vbus47 ratio vbus47 reference ratio for special charger as a percentage of v bus voltage, v b = 5v 44 47 50 % vbus60 ratio vbus60 57.5 60.3 63.5 % dcd m time t mdeb all comparators 20 30 40 ms dcd c time t cdeb all comparators 5 ms dcd timer 2 s charger-detect source time t dp_src_on dchk = 0 40 ms dchk = 1 625 charger-detect-type detection time t dp_res_on 120 ms charger-detect delay time t dp_src_hicrnt 40 80 ms v b attach to ce1 and ce2 output time t vbsw from v b > v vbdet or chg_typ_m = 1 (dchk = 0) to ce1 and/or ce2 change 520 ms from v b > v vbdet or chg_typ_m = 1 (dchk = 1) to ce1 and/or ce2 change 1450 v b raw-detect threshold v vbraw 1.7 2.6 3.5 v v b -detect threshold v vbdet 3.2 3.5 3.3 v v b -detect threshold hysteresis v vbdet_hys 38 50 mv usb analog switches (cd-, cd+) analog-signal range v dn2 , v dp2 cp_ena = 0 (MAX14578E) 0 v vccint v cp_ena = 1 v swneg v swpos on- resistance r onusb v bat = +3.0v, i cd+ = i cd- = 10ma, v cd+ , v cd- = 0 to +3.0v 3.3 6 i on -resistance match between channels d r onusb v bat = +3.0v, i cd+ = i cd- = 10ma, v cd+ , v cd- = +400mv 0.5 i on -resistance flatness r flatusb v bat = +3.0v, i cd+ = i cd- = 10ma, v cd+ , v cd- = 0 to +3.3v 0.06 0.26 i off-leakage current i lusb(off) v bat = 4.2v, switch open, v cd+ = v cd- = +0.3v or +2.5v; v td+ or v td- = +2.5v or +0.3v -360 +360 na on-leakage current i lusb(on) v bat = 4.2v, switch closed, v cd+ or v cd- = +0.3v or +2.5v -360 +360 na digital signals ( int , scl, sda, en , ce0, ce1, ce2) input logic-high v ih 1.4 v input logic-low v il 0.4 v input leakage current i inleak -1 +1 f a open-drain low v odol i sink = 1ma 0.4 v MAX14578E/max14578ae
_______________________________________________________________________________________ 5 usb battery charger detectors note 4: all units are 100% production tested at t a = +25 n c. limits over the operating temperature range are guaranteed by design and not production tested. note 5: guaranteed by design; not production tested. electrical characteristics (continued) (v bat = +2.8v to +5.5v, v b = +3.5v to +5.5v, t a = -40 n c to +85 n c, unless otherwise noted. typical values are at v bat = +3.6v, v b = +5.0v, t a = +25 n c.) (note 4) parameter symbol conditions min typ max units output logic-high v oh i source = 1ma v io - 0.2 v output logic-low v ol i sink = 1ma 0.2 v dynamic (note 5) charge-pump delay time t cp cp_ena from 0 to 1 until switch on 1 ms analog-switch turn-on time t on MAX14578E, i 2 c stop to switch on, r l = 50 i 0.1 1 ms analog-switch turn-off time t off MAX14578E, i 2 c stop to switch off, r l = 50 i 0.1 1 ms break-before-make delay time t bbm r l = 50 i , t a = +25 n c > 0 f s off-capacitance c off td-, td+, applied voltage is 0.5v p-p , dc bias = 0v, f = 240mhz; cd-, cd+ not connected to td-, td+ 2 pf on-capacitance c on td-, td+, applied voltage is 0.5v p-p , dc bias = 0v, f = 240mhz; cd-, cd+ connected to td-, td+; r l = 50 i 4.5 pf -3db bandwidth bw v cd_ = 0.5v p-p 1000 mhz off-isolation v iso r l = 50 i , f = 20khz, v cd_ = 0.5v p-p -60 db i 2 c timing specifications i 2 c max clock f i2cclk 400 khz bus free time between stop and start conditions t buf 1.3 f s start condition setup time 0.6 f s repeat start condition setup time t su:sta 90% to 90% 0.6 f s start condition hold time t hd:sta 10% of sda to 90% of scl 0.6 f s stop condition setup time t su:sto 90% of scl to 10% of sda 0.6 f s clock low period t low 10% to 10% 1.3 f s clock high period t high 90% to 90% 0.6 f s data valid to scl rise time t su:dat write setup time 100 ns data hold time to scl fall t hd:dat write hold time 0 ns esd protection cd+, cd- human body model 15 kv iec 61000-4-2 contact discharge 8 MAX14578E/max14578ae
6 ______________________________________________________________________________________ usb battery charger detectors typical operating characteristics (v bat = +4.2v, v b = +5.0v, c bat = 1 f f, c vb = 1 f f, unless otherwise noted.) analog-switch eye diagram time (x 10 -9 s) differential signal (v) 2.0 1.8 1.4 1.6 0.4 0.6 0.8 1.0 1.2 0.2 -0.5 -0.4 -0.3 -0.2 -0.1 0 0.1 0.2 0.3 0.4 0.5 0 MAX14578E toc09 lout load regulation (max14578ae) MAX14578E toc08 lout current (ma) lout voltage (v) 8 6 4 2 3.5 4.0 4.5 5.0 5.5 6.0 3.0 01 0 v b = 6v t a = +85c t a = +25c t a = -40c lout voltage regulation (max14578ae) MAX14578E toc07 v b supply voltage (v) lout voltage (v) 6.5 6.0 5.5 5.0 4.5 3.5 4.0 4.5 5.0 5.5 6.0 3.0 4.0 7.0 i lout = 1ma t a = +85c t a = +25c t a = -40c v b supply current vs. supply voltage (max14578ae) MAX14578E toc06 v b supply voltage (v) v b supply current (a) 5.3 5.1 4.9 4.7 50 100 150 200 0 4.5 5.5 v bat = +3.6v, en = high t a = +85 c t a = +25c t a = -40c v b supply current vs. supply voltage (MAX14578E) MAX14578E toc05 v b supply voltage (v) v b supply current (a) 5.3 5.1 4.9 4.7 50 100 150 200 0 4.5 5.5 v bat = +3.6v, cp_ena = 0, usbswc = 0 t a = +85 c t a = +25c t a = -40c bat supply current vs. supply voltage MAX14578E toc04 bat supply voltage (v) bat supply current (a) 3.8 3.3 5 10 15 20 25 0 2.8 4.3 v b = 0v, cp_ena = 0, usbswc = 1 t a = +85c t a = +25c t a = -40c bat supply current vs. supply voltage MAX14578E toc03 bat supply voltage (v) bat supply current (a) 3.8 3.3 10 20 30 40 50 0 2.8 4.3 v b = 0v, cp_ena = 1, usbswc = 0 t a = +85 c t a = +25c t a = -40c bat supply current increase vs. supply voltage MAX14578E toc02 bat supply voltage (v) bat supply current (a) 3.8 3.3 2 4 6 8 10 0 2.8 4.3 t a = +85 c t a = +25 c v b = 0v, cp_ena = 0, usbswc = 0 v sda = v scl = 1.8v t a = -40c bat supply current vs. supply voltage MAX14578E toc01 bat supply voltage (v) bat supply current (a) 3.8 3.3 0.5 1.0 1.5 2.0 0 2.8 4.3 v b = 0v, cp_ena = 0, usbswc = 0 v sda = v scl = 0v t a = +85c t a = +25c t a = -40c MAX14578E/max14578ae
_______________________________________________________________________________________ 7 usb battery charger detectors typical operating characteristics (continued) (v bat = +4.2v, v b = +5.0v, c bat = 1 f f, c vb = 1 f f, unless otherwise noted.) ce_ vs. v bus connection (max14578ae) usb charging downstream port (v td+ = 3v) MAX14578E toc16 100ms/div v b 5v/div v cd+ 2v/div v ce2 5v/div v ce1 5v/div ce_ vs. v bus connection (MAX14578E) apple 1a charger, usb compliant (usb_cpl = 1, usbswc = 0, v td+ = 3v) MAX14578E toc15 20ms/div v b 5v/div v cd+ 2v/div v ce2 5v/div v ce1 5v/div ce_ vs. v bus connection (MAX14578E) usb charging downstream port, usb compliant (usb_cpl = 1, usbswc = 0, v td+ = 3v) MAX14578E toc14 40ms/div v b 5v/div v cd+ 0.5v/div v ce2 5v/div v ce1 5v/div logic-input threshold vs. supply voltage MAX14578E toc13 bat supply voltage (v) logic-input threshold (v) 5.2 4.9 4.6 4.3 4.0 3.7 3.4 3.1 0.5 1.0 1.5 2.0 0 2.8 5.5 v ih v il cd+/cd- leakage current vs. temperature MAX14578E toc12 temperature (c) cd+/cd- leakage current (na) 60 35 10 -15 10 20 30 40 50 0 -40 85 off-leakage on-leakage cd+/cd- frequency response MAX14578E toc11 frequency (mhz) cd+/cd- frequency response (db) 100 1 -60 -40 -20 0 -80 0.01 10,000 on-loss off-isolation cd+/cd- on-resistance vs. v cd_ voltage MAX14578E toc10 v cd_ voltage (v) cd+/cd- on-resistance () 2.5 2.0 1.5 1.0 0.5 1 2 3 4 5 0 0 3.0 t a = +85c t a = +25c t a = -40c i cd_ = 10ma MAX14578E/max14578ae
8 ______________________________________________________________________________________ usb battery charger detectors pin/ bump configurations pin/bump description top view (bump side down) a b c () max14578ae only. () max14578ae only. wlp 24 13 + cd+ cd- v b int (lout) gnd scl (en) sda (ce0) ce1 td+ td- bat ce2 MAX14578E/max14578ae 15 16 14 13 5 6 7 n.c. cd+ 8 td+ n.c. (lout_sns) int (lout) ce2 13 scl (en) 4 12 10 9 td- n.c. v b bat cd- gnd ep* n.c. ce1 2 11 sda (ceo) tqfn MAX14578E max14578ae top view + *connect ep to gnd. pin name function MAX14578E max14578ae tqfn-ep wlp tqfn-ep wlp 1 c1 1 c1 td+ usb transceiver d+ connection 2, 3, 10, 16 2, 3, 16 n.c. no connection. not internally connected. 4 a1 4 a1 cd+ usb connector d+ connection 5 b1 5 b1 gnd ground 6 a2 6 a2 cd- usb connector d- connection 7 c3 7 c3 bat battery connection input. connect a 1 f f capacitor as close as possible between bat and gnd. 8 a3 8 a3 v b usb connector v bus connection. connect a 1 f f capacitor as close as possible between v b and gnd for q 15kv esd protection. 9 a4 int active-low interrupt request, open-drain output 9 a4 lout +5.3v usb transceiver v bus power output. connect a 1 f f capacitor as close as possible between lout and gnd. 10 lout_sns connect externally to lout (max14578ae, tqfn only) 11 b4 11 b4 ce1 charger-enable control 1, open-drain output 12 c4 12 c4 ce2 charger-enable control 2, open-drain output 13 b3 sda i 2 c serial-data input/output. connect sda to an external pullup resistor. 13 b3 ce0 charger-enable control 0, open-drain output 14 b2 en active-low enable input. drive en low to enable the charger id detection and close the usb switches after charger detection is complete. MAX14578E/max14578ae
_______________________________________________________________________________________ 9 usb battery charger detectors MAX14578E functional diagram/typical application circuit pin/bump description (continued) MAX14578E usb charger detection control logic usb transceiver cd+ td+ cd- td- id d+ d- v cc v b 1f pmic/ charger micro-b usb connector d- id gnd d+ v bus audio codec/ amplifier processor bat ce1 battery ce2 v io gnd 1f int int scl scl sda sda v io v io pin name function MAX14578E max14578ae tqfn-ep wlp tqfn-ep wlp 14 b2 scl i 2 c serial-clock input. connect scl to an external pullup resistor. 15 c2 15 c2 td- usb transceiver d- connection ep exposed pad (tqfn only). ep is internally connected to gnd. connect to a large ground plane to maximize thermal performance. not intended as an electrical connection point. MAX14578E/max14578ae
10 _____________________________________________________________________________________ usb battery charger detectors max14578ae functional diagram/typical application circuit max14578ae max14544 max8903/max8934 max8677 usb charger detection ldo control logic usb transceiver cd+ td+ cd- td- id lout d+ d- v cc v b 1f 1f switch mode charger micro-b usb connector d- id gnd d+ v bus audio codec/ amplifier processor bat ce2 battery battery ce1 ce0 iusb dcm usus chg v cc gnd 1f en en v io MAX14578E/max14578ae
______________________________________________________________________________________ 11 usb battery charger detectors table 1. register map table 2. detailed register map address name bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 0x00 device id vendor_id chip_rev 0x01 control 1 intpol inten usbswc cp_ena low_pow dchk chg_typ_m usb_chgdet 0x02 interrupt chg_typ vbcomp dbchg dcd_t chgrun rfu 0x03 control 2 dcd_en db_exit db_idle sus_low ce_frc ce 0x04 control 3 rfu rfu rfu cdp_det usb_cpl sfout_en sfoutasrt dcd_exit field name read/write bit default description device id (i 2 c address = 0x00) vendor_id read only [7:4] 0010 vendor identification chip_rev read only [3:0] 0001 chip revision control 1 (i 2 c address = 0x01) intpol read/write 7 0 interrupt polarity 0 = active low 1 = active high inten read/write 6 0 interrupt enable. if interrupt is disabled, pending interrupts are not cleared and the int pin deasserts. inten is a global setting to mask all interrupts. 0 = interrupt disabled 1 = interrupt enabled usbswc read/write 5 0 opens/closes usb switch 0 = switch open 1 = switch closed cp_ena read/write 4 0 charge-pump enable 0 = charge pump disabled 1 = charge pump enabled low_pow read/write 3 1 low-power mode 0 = low-power mode disabled; oscillator/bandgap always on 1 = low-power mode enabled; oscillator/bandgap turned off under the following conditions: no v bus , usbswc = 0, and cp_ena = 0 dchk read/write 2 0 charger-type source-detection time 0 = dchk, t dp_src_on = 40ms 1 = dchk, t dp_src_on = 625ms chg_typ_m read/write 1 0 charger-type manual-detection enable. set chg_typ_m to 1 to force the internal logic to open the usb switches and perform a charger-type detection. after the detection state matching completes, this bit resets to 0. 0 = charger detection disabled 1 = force a manual charge detection MAX14578E/max14578ae
12 _____________________________________________________________________________________ usb battery charger detectors table 2. detailed register map (continued) field name read/write bit default description usb_chgdet read/write 0 1 charger-detection-enable start. charger detection starts with any change in v b . 0 = charger detection disabled 1 = charger detection enabled interrupt (i 2 c address = 0x02) chg_typ read only [7:5] 000 output of usb charger detection 000 = nothing attached 001 = usb cable attached 010 = charging dowstream port: current depends on usb operating speed 011 = dedicated charger: current up to 1.8a 100 = special charger: 500ma max 101 = special charger: current up to 1a 110 = rfu 111 = dead-battery charging: 100ma max vbcomp read only 4 0 output of v b comparator. changes in vbcomp triggers interrupt. 0 = v b < v vbdet 1 = v b r v vbdet dbchg read only 3 0 dead-battery charger mode. if dbchg = 1, the 45-minute timer is running. 0 = not in dead-battery charge mode 1 = in dead-battery charge mode dcd_t read only 2 0 data-contact detection (dcd) time wait. dcd_t generates an interrupt after a 0-to-1 transition. 0 = data contact detection not running 1 = data contact detection running for > 2s chgrun read only 1 0 charger-detection state machine running. for information onlyno interrupt generated. 0 = charger detection not running 1 = charger detection running (dcd, dead battery, d+/d- short) rfu read only 0 0 reserved control 2 (i 2 c address = 0x03) dcd_en read/write 7 1 dcd enable. if dcd_en = 1, d+/d- is tested for a short after dcd passes. if dcd_en = 0, dcd is skipped and d+/d- short detection begins when v bus is connected or chg_typ_m = 1. if dcd is stuck (dcd_t) = 1, setting dcd_en = 0 bypasses dcd and d+/d- short detection begins. 0 = disabled 1 = enabled MAX14578E/max14578ae
______________________________________________________________________________________ 13 usb battery charger detectors table 2. detailed register map (continued) note: cp_ena, dchk, usb_chgdet, dcd_en, sus_low, ce_frc, ce, usb_cpl, sfout_en, sfoutasrt, and dcd_exit can be configured to have different default values. contact the factory for more information. * default value for max14578ae only. field name read/write bit default description db_exit read/write 6 0 exit dead-battery charge mode. if dbchg = 1, setting db_exit to 1 stops the 45-minute timer, sets dbchg to 0, and leaves chg_en = 1. db_exit is automatically reset to 0 if v bat reaches the dead-battery threshold. 0 = do not exit dead-battery mode 1 = exit dead-battery mode db_idle read/write 5 0 dead-battery idle mode. db_idle = 1 in dead-battery mode to forces the usb switch to close. db_idle is automatically reset when the usb switch is closed. 0 = dead-battery mode off or test completed 1 = dead-battery mode on or test still needed sus_low read/write 4 0 (1)* suspend mode selection 0 = when the charger is disabled, ce1 = ce2 = 1 1 = when the charger is disabled, ce1 = ce2 = 0 ce_frc read/write 3 0 ce outputs force enable 0 = ce outputs follow the charger-detection finite state machine (fsm) 1 = ce outputs follow the ce[2:0] register regardless of the result from the charger-detection fsm ce read/write [2:0] 000 ce outputs (ce2, ce1, ce0). if ce_frc = 0, registers are set by the result of charger fsm. if ce_frc = 1, registers are set by i 2 c command only. control 3 (i 2 c address = 0x04) rfu read/write [7:5] 000 reserved cdp_det read/write 4 0 0 = normal detection 1 = resistive detection usb_cpl read/write 3 1 (0)* usb compliance 0 = device is not usb compliant 1 = device is usb compliant sfout_en read/write 2 0 (1)* lout enable 0 = lout off 1 = lout on as per sfoutasrt sfoutasrt read/write 1 1 lout assert timing 0 = lout asserts when the charger-detection fsm completes 1 = lout asserts after valid v bus voltage detection dcd_exit read/write 0 1 exit charger-type-detection routine after dcd_t is set to 1 0 = disabled 1 = enabled MAX14578E/max14578ae
14 _____________________________________________________________________________________ usb battery charger detectors detailed description the MAX14578E/max14578ae are usb charger detec - tors compliant with usb battery charging revision 1.1. the usb charger-detection circuitry detects usb stan - dard downstream ports (sdps), usb charging down - stream ports (cdps), or dedicated charger ports (dcps), and controls an external lithium-ion (li+) battery charger. the MAX14578E features i 2 c communication, while the max14578ae features an en pin and an ldo output pin. the internal usb switch is compliant to hi-speed usb, full-speed usb, and low-speed usb signals. both devic - es feature low on-resistance, low on-resistance flatness, and very low capacitance. input sources and routing the typical micro/mini-usb connector has five signal lines: usb power, two usb signal lines (d-, d+), id line, and ground. the usb power on the micro/mini-usb con - nector connects to v b on the MAX14578E/max14578ae. the two usb signal lines, d- and d+, connect to cd- and cd+. usb (cd-, cd+) the MAX14578E/max14578ae support hi-speed (480mbps), full-speed (12mbps), and low-speed usb (1.5mbps) signal levels. the usb channel is bidirectional and has low 3.3 i (typ) on-resistance and 4.5pf (typ) on-capacitance. the low on-resistance is stable as the analog input signals are swept from ground to v swpos for low signal distortion. lout ldo output (max14578ae only) the lout ldo provides a 5.3v (typ) output, used to power a usb transceiver. most usb transceivers are powered from a 3.3v or higher voltage that is difficult to derive from a li+ battery. one solution is to power the transceivers from the usb v bus power; however, v bus can rise as high as +28v in a fault condition. the lout pin provides a voltage-limited supply that protects the usb transceiver from these high voltages. when v bus rises above 9.0v (typ), the max14578ae detects an overvoltage fault and lout goes to 0v. additionally, lout features a 100ma (typ) current limit to protect the device in the event of a short circuit. interrupts the MAX14578E generates an interrupt for any change in vbcomp, and when dbchg or dcd_t transitions from 0 to 1. the inten bit in the control 1 register (0x01) enables interrupt output. when inten is set to zero, all interrupts are masked but not cleared. a read to the interrupt register (0x02) is required to clear interrupts. detection debounce to avoid multiple interrupts at the insertion of an acces - sory and for added noise/disturbance protection, a 30ms (typ) debounce timer is present that requires an inserted or removed state hold for the debounce time before it sends an interrupt. low-power modes the MAX14578E has two i 2 c bits in the control 1 register (0x01) dedicated to low-power operation: low_pow and cp_ena. low_pow sets low-power mode. in low-power mode, the internal oscillator is turned off under the following conditions: no v bus , usbswc = 0, and cp_ena = 0. when enabled, all switches are high impedance (note that no negative rail voltage can be applied). cp_ena controls the charge pump required for proper operation of the analog switches. when set to disable, no negative rail voltage can be applied. a factory default sets cp_ena = 0 automatically. usb charger detection the MAX14578E includes internal logic to detect if a valid usb charger is connected. when a valid v bus voltage is applied to v b or when chg_typ_m in the control 1 register is set to 1, the MAX14578E/max14578ae begin the charger-type-detection sequence (see figure 1). during the charger-type-detection sequence, the cd- and cd+ switches are open, and once the sequence completes, the switches return to their previous state. figure 2 shows a timing diagram for an example char - ger-type-detection sequence. MAX14578E/max14578ae
______________________________________________________________________________________ 15 usb battery charger detectors figure 1. charger-type-detection sequence figure 2. charger-detection timing t mdeb v b dcd start enable comparators lout enable (max14578ae) (sfoutasrt = 0) chgrun v vbdet dcd pass d+/d- short dedicated charger chg_typ = 011 enable charging downstream port detection enable standard downstream port detection t mdeb t mdeb t mdeb t dp_src_on charger configura tion (usb switch closed) configure ce_ special charger sony charger test apple charger test dcp/cdp test dcd begin dcd tes t d+/d- shor t test dormant ce_ = hi-z v b < v vbdet v b < v vbdet () max14578ae only. v b > v vbdet MAX14578E: usb_chgdet = 1 max14578ae: v en = 0v not dcd compliant dcd compliant MAX14578E/max14578ae
16 _____________________________________________________________________________________ usb battery charger detectors figure 3 shows d+/d- terminations for a standard usb host/charging downstream port, an apple charger, a sony charger, and a dedicated charger. charger-enable control outputs the MAX14578E/max14578ae feature digital open-drain outputsce0 (max14578ae only), ce1, and ce2to control an external charger autonomously. see table 3. figure 3. standard usb host/charging downstream port, apple charger, sony charger, and dedicated charger table 3. charger-enable control outputs note: when ce_frc = 1, ce[2:0] are set by an i 2 c command. x = dont care. v load pu 3.6v standard usb host chargin g downstream port hlpu 300k hpd 14.25k to 24.8k d+ v load pu 3.6v hlpu 300k hpd 14.25k to 24.8k d- v bus 5.0v apple charger adppu 75.0k adppd 49.9k d+ v bus 5.0v admpu 43.2k (for 1a) 75.0k (for 0.5a) admpd 49.9k d- v bus 5.0v sony charger sdppu 5.1k sdppd 10k d+ v bus 5.0v sdppu 5.1k sdppd 10k d- v bus 5.0v dedicated charger 2m (min) d+ 2m (min) d- sus_low en chg_typ usb_cpl ce2 ce1 ce0 0 1 x x 1 1 1 1 1 x x 0 0 1 0 0 000 x 1 1 1 1 0 000 x 0 0 1 0 0 110 x 1 1 1 1 0 110 x 0 0 1 x 0 001 0 1 0 0 0 0 001 1 1 1 1 1 0 001 1 0 0 1 x 0 010 x 0 1 0 x 0 011 x 0 1 0 x 0 100 x 1 0 0 x 0 101 x 0 1 0 x 0 111 x 0 0 0 MAX14578E/max14578ae
______________________________________________________________________________________ 17 usb battery charger detectors i 2 c serial interface (MAX14578E) serial addressing the MAX14578E operates as a slave device that sends and receives data through an i 2 c-compatible 2-wire interface. the interface uses a serial-data line (sda) and a serial-clock line (scl) to achieve bidirectional commu - nication between master(s) and slave(s). a master (typi - cally a microcontroller) initiates all data transfers to and from the MAX14578E and generates the scl clock that synchronizes the data transfer. the sda line operates as both an input and an open-drain output. a pullup resis - tor is required on sda. the scl line operates only as an input. a pullup resistor is required on scl if there are multiple masters on the 2-wire interface, or if the master in a single-master system has an open-drain scl output. each transmission consists of a start condition (figure 4) sent by a master, followed by the MAX14578E 7-bit slave address plus a r/ w bit, a register address byte, one or more data bytes, and finally a stop condition. start and stop conditions both scl and sda remain high when the interface is not busy. a master signals the beginning of a transmission with a start (s) condition by transitioning sda from high to low while scl is high (see figure 5). when the master has finished communicating with the slave, it issues a stop (p) condition by transitioning sda from low to high while scl is high. the bus is then free for another transmission. figure 4. i 2 c interface timing details figure 5. start and stop conditions sda scl t hd:sta t low t high t r t su:dat t su:sta t su:sto t buf t hd:sta t hd:dat start condition stop condition start condition repeated start condition t r sda scl start condition stop condition s p MAX14578E/max14578ae
18 _____________________________________________________________________________________ usb battery charger detectors figure 6. bit transfer figure 7. acknowledge figure 8. slave address bit transfer one data bit is transferred during each clock pulse (figure 6). the data on sda must remain stable while scl is high. acknowledge the acknowledge bit is a clocked 9th bit that the recipient uses to handshake receipt of each byte of data (figure 7). thus, each byte transferred effectively requires nine bits. the master generates the 9th clock pulse, and the recipient pulls down sda during the acknowledge clock pulse. the sda line is stable low during the high period of the clock pulse. when the master is transmitting to the MAX14578E, it generates the acknowledge bit because the MAX14578E is the recipient. when the MAX14578E is transmitting to the master, the master generates the acknowledge bit because the master is the recipient. slave address the MAX14578E has a 7-bit long slave address. the bit following a 7-bit slave address is the r/ w bit, which is low for a write command and high for a read command. the slave address is 01011001 for read commands and 01011000 for write commands. see figure 8. bus reset the MAX14578E resets the bus with the i 2 c start condition for reads. when the r/ w bit is set to 1, the MAX14578E transmits data to the master, thus the mas - ter is reading from the device. sda scl data line stable; data valid change of data allowed scl sda by transmitter clock pulse for acknowledge start condition sda by receiver 1 2 8 9 s sda 1 ack scl msb lsb 0 1 r/w 01 00 MAX14578E/max14578ae
______________________________________________________________________________________ 19 usb battery charger detectors format for writing a write to the MAX14578E comprises the transmission of the slave address with the r/ w bit set to zero, fol - lowed by at least one byte of information. the first byte of information is the register address or command byte. the register address determines which register of the MAX14578E is to be written by the next byte, if received. if a stop (p) condition is detected after the register address is received, the MAX14578E takes no further action beyond storing the register address (figure 9). any bytes received after the register address are data bytes. the first data byte goes into the register selected by the register address, and subsequent data bytes go into subsequent registers (figure 10). if multiple data bytes are transmitted before a stop condition, these bytes are stored in subsequent registers because the register addresses autoincrements. format for reading the MAX14578E is read using the internally stored reg - ister address as an address pointer, the same way the stored register address is used as an address pointer for a write. the pointer autoincrements after each data byte is read using the same rules as for a write. thus, a read is initiated by first configuring the register address by performing a write (figure 11). the master can now read consecutive bytes from the MAX14578E, with the first data byte being read from the register address pointed by the previously written register address. once the master sends a nack, the MAX14578E stops send - ing valid data. figure 9. format for i 2 c write figure 10. format for writing to multiple registers 0101 00 1 address = 0x58 register 0x01 write data s d7 d6 d5 d4 d2 d1 d3 0 = write 0000 001 0 register address = 0x01 0a a p d0 a s = start bit p = stop bit a = ack n = nack d_ = data bit 0101 00 1 address = 0x58 register 0x01 write data s 0 = write 0000 001 0 register address = 0x01 0a a d7 d6 d5 d4 d2 d1 d0 d3 a register 0x02 write data d7 d6 d5 d4 d2 d1 d3 d0 a/n p MAX14578E/max14578ae
20 _____________________________________________________________________________________ usb battery charger detectors figure 11. format for reads (repeated start) applications information charger control the MAX14578E charger-enable control outputs are ideal for autonomous external charger control. table 4 shows example connections for various maxim chargers. hi-speed usb hi-speed usb requires careful pcb layout with 45 i single-ended/90 i differential controlled-impedance matched traces of equal lengths. power-supply bypassing bypass v b and bat with 1 f f ceramic capacitors to gnd as close as possible to the device. choosing i 2 c pullup resistors i 2 c requires pullup resistors to provide a logic-high level to data and clock lines. there are trade-offs between power dissipation and speed, and a compromise must be made in choosing pullup resistor values. every device connected to the bus introduces some capacitance even when device is not in operation. i 2 c specifies 300ns rise times to go from low to high (30% to 70%) for fast-mode, which is defined for a clock frequency up to 400khz (see the i 2 c serial interface (MAX14578E) section for details). to meet the rise time requirement, choose pullup resis - tors so that t r = 0.85 x r pullup x c bus < 300ns. if the transition time becomes too slow, the setup and hold times may not be met and waveforms may not be rec - ognized. extended esd protection esd-protection structures are incorporated on all pins to protect against electrostatic discharges up to 2kv (human body model) encountered during handling and assembly. the cd- and cd+ pins are further protected against esd up to 15kv (human body model) and q 8kv iec 61000-4-2 contact discharge without damage. table 4. ce_ outputs for different charger control () max14578ae only. 010 1 000 1 address = 0x58 00 00 00 1 0 register 0x00 read data s p 010 1 001 1 address = 0x59 s d7 d6 d5 d4 d2 d1 d0 d3 p register address = 0x01 0 = write 1 = read a a a/n a/n ce_ outputs off 100ma 500ma i set max8606, max8856 max8814, max8845 sus_low = 0 (ce0) 1 0 0 0 en ce1 1 0 0 1 en1 ce2 1 0 1 0 en2 ce_ outputs off 100ma 500ma i set max8934, max8677 max8903 sus_low = 1 (ce0) 1 0 0 0 usus usus ce1 0 0 0 1 pen1 dcm ce2 0 0 1 0 pen2 iusb MAX14578E/max14578ae
______________________________________________________________________________________ 21 usb battery charger detectors the v b input withstands up to 15kv (hbm) if bypassed with a 1 f f ceramic capacitor close to the pin. the esd structures withstand high esd both in normal operation and when the devices are powered down. after an esd event, the MAX14578E/max14578ae continue to func - tion without latchup. esd test conditions esd performance depends on a variety of conditions. contact maxim for a reliability report that documents test setup, test methodology, and test results. human body model figure 12 shows the human body model, and figure 13 shows the current waveform it generates when dis - charged into a low-impedance state. this model con - sists of a 100pf capacitor charged to the esd voltage of interest that is then discharged into the device through a 1.5k i resistor. iec 61000-4-2 the iec 61000-4-2 standard covers esd testing and performance of finished equipment. however, it does not specifically refer to integrated circuits. the MAX14578E/ max14578ae assist in designing equipment to meet iec 61000-4-2 without the need for additional esd-protection components. the major difference between tests done using the human body model and iec 61000-4-2 is higher peak current in iec 61000-4-2, because series resistance is lower in the iec 61000-4-2 model. hence, the esd with - stand voltage measured to iec 61000-4-2 is generally lower than that measured using the human body model. figure 14 shows the iec 61000-4-2 model, and figure 15 shows the current waveform for iec 61000-4-2 esd contact discharge test. figure 12. human body esd test model figure 14. iec 61000-4-2 esd test model figure 13. human body current waveform figure 15. iec 61000-4-2 esd generator current waveform charge-current- limit resistor discharge resistance storage capacitor c s 100pf r c 1m r d 1.5k high- voltage dc source device under test 100% 36.8% t rl time t dl peak-to-peak ringing (not drawn to scale) i r 0 0 i peak (amps) 90% 10% charge-current- limit resistor discharge resistance storage capacitor c s 150pf r c 50m to 100m r d 330 high- voltage dc source device under test t r = 0.7ns to 1ns 30ns 60ns t 100% 90% 10% i peak (amps) MAX14578E/max14578ae
22 _____________________________________________________________________________________ usb battery charger detectors chip information process: bicmos package information for the latest package outline information and land patterns (footprints), go to www.maxim-ic.com/packages . note that a +, #, or - in the package code indicates rohs status only. package drawings may show a different suffix character, but the drawing pertains to the package regardless of rohs status. package type package code outline no. land pattern no. 12 wlp w121a1+1 21-0449 refer to application note 1891 16 tqfn t1633+5 21-0136 90-0032 MAX14578E/max14578ae
maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circuit patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 23 ? 2012 maxim integrated products maxim is a registered trademark of maxim integrated products, inc. usb battery charger detectors revision history revision number revision date description pages changed 0 3/11 initial release 1 2/12 added tqfn package, corrected MAX14578E functional diagram/typical operating circuit , and corrected default values for max14578ae in table 2 1, 2, 8, 9, 13, 22 MAX14578E/max14578ae

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